Commit e53e8f94 authored by Iulian Gheorghiu's avatar Iulian Gheorghiu

Delete the initial for synthesis.

parent 72351237
......@@ -560,18 +560,6 @@ module mega_alu # (
input SEL_INSTRUCTION_SBIW,
input SEL_INSTRUCTION_MUL
);
initial
begin
ALU_FLAG_C_OUT = 0;
ALU_FLAG_Z_OUT = 0;
ALU_FLAG_N_OUT = 0;
ALU_FLAG_V_OUT = 0;
ALU_FLAG_S_OUT = 0;
ALU_FLAG_H_OUT = 0;
ALU_FLAG_T_OUT = 0;
ALU_FLAG_I_OUT = 0;
end
reg in_addr_1_and_2_equal;
......
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