Commit 398c9bc2 authored by Iulian Gheorghiu's avatar Iulian Gheorghiu

Adapt the simulation top to the latest changes.

parent c449ded4
......@@ -233,7 +233,8 @@ assign jc = {jc_int[7:1], lcd_v_int};
lcd # (
.MASTER("TRUE"),
.DEBUG(""),//"PATERN_RASTER"
.DISPLAY_CFG("1280_720_60_DISPLAY_74_25_Mhz"),
.ADDRESS('hE0),
.BUS_VRAM_ADDR_LEN(24),
.BUS_VRAM_DATA_LEN(8),
......@@ -241,35 +242,19 @@ lcd # (
.DINAMIC_CONFIG("FALSE"),
.VRAM_BASE_ADDRESS_CONF(0),
`ifndef USE_HDMI_OUTPUT
/* LCD */
.H_RES_CONF(800),
.H_PULSE_WIDTH_CONF(2),
.H_BLANKING_CONF(46),
.H_FRONT_PORCH_CONF(210),
.V_RES_CONF(480),
.V_PULSE_WIDTH_CONF(2),
.V_BLANKING_CONF(23),
.V_FRONT_PORCH_CONF(22),
.PIXEL_SIZE_CONF(16),
.HSYNK_INVERTED_CONF(1'b1),
.VSYNK_INVERTED_CONF(1'b1),
.DATA_ENABLE_INVERTED_CONF(1'b0),
`else
/* HDMI */
/* This timings are for AT070TN92 LCD display module but is not tacken in account because we will load a default setup with DISPLAY_CFG parameter.*/
.H_RES_CONF(720),
.H_PULSE_WIDTH_CONF(62),
.H_BLANKING_CONF(138),
.H_BACK_PORCH_CONF(138),
.H_FRONT_PORCH_CONF(16),
.H_PULSE_WIDTH_CONF(62),
.V_RES_CONF(480),
.V_PULSE_WIDTH_CONF(6),
.V_BLANKING_CONF(45),
.V_BACK_PORCH_CONF(45),
.V_FRONT_PORCH_CONF(9),
.V_PULSE_WIDTH_CONF(6),
.PIXEL_SIZE_CONF(16),
.HSYNK_INVERTED_CONF(1'b0),
.VSYNK_INVERTED_CONF(1'b0),
.DATA_ENABLE_INVERTED_CONF(1'b0),
`endif
.DEDICATED_VRAM_SIZE(800 * 480)
)lcd_inst(
.rst(sys_rst),
......@@ -300,7 +285,9 @@ lcd # (
);
`ifdef USE_HDMI_OUTPUT
hdmi_out hdmi_out_inst(
hdmi_out # (
.PLATFORM("XILINX_ARTIX_7")
)hdmi_out_inst(
.rst(sys_rst),
.clk(lcd_clk),
.hdmi_tx_cec(hdmi_tx_cec),
......
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