Fix CALL instruction wrong return address stored in stack.
Fix LPM instruction was not implemented. Fix CPSE, SBRC, SBRS, SBIC, SBIS skipping execution even when no need to skip. Fix ICALL instruction Reading only ZL register for call and store wrong return address into stack. Fix SEx instruction inverse behavior on flag C. Fix ASR instruction missing one bit. Fix BLD/BST instruction is BST when BLD and viceversa. Fix LSL/ROL/LSR/ROR instructions injecting resulted carry to bit 15 on the ALU output instead of output carry.
Showing with 0 additions and 0 deletions