Commit 666ba7bb authored by Iulian Gheorghiu's avatar Iulian Gheorghiu

Add Xmage_FPGA platform

parent b4059d2c
......@@ -21,6 +21,8 @@
#include <board/NXP/FRDM-KEAZ128/defs.h>
#elif defined(Xmega_E5_Xplained)
#include <board/ATMEL/Xmega-E5_Xplained/defs.h>
#elif defined(Xmega_FPGA)
#include <board/ATMEL/Xmega-FPGA/defs.h>
#elif defined(FeatherAdaloggerM0)
#include <board/ATMEL/FeatherAdaloggerM0/defs.h>
#elif defined(mikroXmega)
......
......@@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-456894721678331720" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="394361349481413216" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
......@@ -16,7 +16,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-471847259445304380" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="379408811714440556" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
......
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/*
* ExampleXmega_E5_Xplained.cpp
*
* Created: 4/16/2017 9:44:27 PM
* Author: Cutare
*/
#include <avr/io.h>
int main(void)
{
while(1)
{
//TODO:: Please write your application code
}
}
\ No newline at end of file
/*
* io_addrs.h
*
* Created: 8/4/2018 22:10:54
* Author: Work
*/
#ifndef IO_DEFS_H_
#define IO_DEFS_H_
#include "board.h"
#include "board/ATMEL//Xmega-FPGA/xio.h"
#define CPU_FREQ (32000000)
#define UART_INTERFACE_COUNT 0
#define SPI_INTERFACE_COUNT 0
#define TWI_INTERFACE_COUNT 0
#define FPGA_RTC (*(FPGA_RTC_t *) 0x0040) /* Virtual Port */
#define FPGA_PORTA (*(FPGA_PORT_t *) 0x0060) /* Virtual Port */
#define FPGA_PORTB (*(FPGA_PORT_t *) 0x0080) /* Virtual Port */
#endif /* IO_ADDRS_H_ */
\ No newline at end of file
/*
* main.cpp
*
* Created on: Apr 16, 2017
* Author: Cutare
*/
//#include <avr/io.h>
#include <main_app.h>
int main(void)
{
main_app();
}
/*
* main.h
*
* Created on: Apr 16, 2017
* Author: Cutare
*/
#ifndef MAIN_H_
#define MAIN_H_
#define USE_GPIO true
#define USE_UART true
#define USE_I2C false
#define USE_SPI true
#define USE_SCREEN true
#define CALIBRATE_TOUCH_ON_STARTUP false
#define USE_SCREEN_GUI false
#define _USE_PASSWORD_PROTECTION false
#define CONSOLE_UART_IN "uart-3"
#define CONSOLE_UART_OUT "uart-3"
#define CONSOLE_UART_ERR "uart-3"
#define USE_TERMINAL false
#define USE_LWIP false
#define USE_DHCP false
#define USE_LWIP_HTTPD_SERVER false
/* HTTP settings */
#define LWIP_HTTPD_SERVER_DRIVE_PATH "SD1:"
//#define LWIP_HTTPD_SERVER_DRIVE_PATH "USB1:"
#define LWIP_HTTPD_SERVER_PORT 80
#define USE_TFTP false
/* FTP settings */
#define TFTPD_PATH_SERVER_DRIVE_PATH "SD1:"
//#define TFTPD_PATH_SERVER_DRIVE_PATH "USB1:"
#define TFTP_SERVER_PORT 12000
#define USE_FTP false
/* FTP settings */
#define FTPD_PATH_SERVER_DRIVE_PATH "SD1:"
//#define TFTPD_PATH_SERVER_DRIVE_PATH "USB1:"
#define FTP_SERVER_PORT 21
#define USE_SNTP false
#define SNTP_SERVER_ADDRESS "82.197.164.46" /* google */
#define SNTP_UPDATE_DELAY 90000 /* SNTP update every 90 seconds */
//#define _USE_AK8975 "i2c-0"
//#define _USE_BMA250 "spi-0.2"
//#define _USE_BMP180 "i2c-0"
//#define _USE_HIH613x "i2c-0"
//#define _USE_L3GD20 "spi-4.1"
//#define _USE_LEPTON_FLIR false
//#define _USE_MPL3115A2 "i2c-0"
//#define _USE_MPR121 "i2c-0"
//#define _USE_MPU60x0_9150 "i2c-0"
//#define _USE_LSM9DS1 "i2c-0"
//#define _USE_LPS25HB "i2c-0"
//#define _USE_MCP79410 "i2c-0"
//#define _USE_TCN75A "i2c-0"
//#define _USE_SSD1331 &lcd_UG9664HDDAG01_LANDSCAPE, (string)"spi-0.0", (string)"pc1", (string)"pc13", (string)"pb13", (string)"pb12"
/* Need for update */
//#define _USE_MS5611 false
//#define _USE_MHC5883 false
//#define _USE_ADXL345 false
//#define _USE_SHT11 false
//#define _USE_SX150x false
//#define _USE_SRF02 false
//#define _USE_nRF25l01 false
#define SHOW_SENSORS_RESULT_ON_SCREEN false
#define _USE_INT_ADC false
#define USE_DRIVER_SEMAPHORE false
/* Debug */
#define MMCSD_DEBUG_EN false
#include <main_app.h>
#endif /* MAIN_H_ */

Microsoft Visual Studio Solution File, Format Version 11.00
# Atmel Studio Solution File, Format Version 11.00
Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "ExampleXmega_FPGA", "ExampleXmega_E5_Xplained\ExampleXmega_FPGA.cppproj", "{4BCCA38F-80F4-4515-9BD6-CC6697519C63}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|AVR = Debug|AVR
Release|AVR = Release|AVR
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{4BCCA38F-80F4-4515-9BD6-CC6697519C63}.Debug|AVR.ActiveCfg = Debug|AVR
{4BCCA38F-80F4-4515-9BD6-CC6697519C63}.Debug|AVR.Build.0 = Debug|AVR
{4BCCA38F-80F4-4515-9BD6-CC6697519C63}.Release|AVR.ActiveCfg = Release|AVR
{4BCCA38F-80F4-4515-9BD6-CC6697519C63}.Release|AVR.Build.0 = Release|AVR
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal
/*
* defs.cpp
*/
#if defined(Xmega_FPGA)
#if __AVR_XMEGA__
#include <avr/pgmspace.h>
#endif
#include "defs.h"
#include <stdio.h>
#include <api/gpio.h>
#include <api/spi.h>
#include <api/i2c.h>
#include <api/uart.h>
ioSetCfgGpio(led_0, "led-0", pin_mux_convert_to_pin(IOD, 4),CfgGpio::GPIO_OUT_PUSH_PULL, false, true, 0);
ioSetCfgGpio(led_1, "led-1", pin_mux_convert_to_pin(IOD, 5),CfgGpio::GPIO_OUT_PUSH_PULL, false, true, 0);
ioSetCfgGpio(hbtn_0, "hbtn-0", pin_mux_convert_to_pin(IOD, 0),CfgGpio::GPIO_IN_FLOATING, false, true, 0);
ioSetCfgGpio(hbtn_1, "hbtn-1", pin_mux_convert_to_pin(IOD, 2),CfgGpio::GPIO_IN_FLOATING, false, true, 0);
ioSetCfgGpio(ug2832_rst, "lcd-rst", pin_mux_convert_to_pin(IOD, 3),CfgGpio::GPIO_OUT_PUSH_PULL, false, false, 0);
ioSetCfgGpio(ug2832_cd, "lcd-cd", pin_mux_convert_to_pin(IOR, 0),CfgGpio::GPIO_OUT_PUSH_PULL, false, false, 0);
//ioSetCfgUart(uart_3, "uart-3", pin_mux_convert_to_pin(IOA, 1) , pin_mux_convert_to_pin(IOA, 1) , 115200 , CfgUart::WORD_LEN_8 , CfgUart::STOP_BITS_ONE , CfgUart::PAR_NONE , CfgUart::MODE_ASYNC);
//ioSetCfgI2c(i2c_0, "i2c-0", pin_mux_convert_to_pin(IOB, 8), pin_mux_convert_to_pin(IOB, 9), 100000);
//ioSetCfgSpi(spi_0_0, "spi-0.0", pin_mux_convert_to_pin(IOC, 5), pin_mux_convert_to_pin(IOC, 7), pin_mux_convert_to_pin(IOC, 6), pin_mux_convert_to_pin(IOR, 1), CfgSpi::spiMode0, 5000000, false);
ioSetCfgEnd(ioTableEnd);
ioSettings *ioSetCfg[] = {
&led_0,
&led_1,
&hbtn_0,
&hbtn_1,
&ug2832_rst,
&ug2832_cd,
//&uart_3,
//&i2c_0,
//&spi_0_0,
&ioTableEnd,
(ioSettings *)-1/* This is an artifice to force linker to put this structure ito .data section, to be sure that this will be initiated before the call of init() function. */
};
#endif/*!FRDM_KEAZ*/
#ifndef __Xmega_FPGA__
#define __Xmega_FPGA__
#if defined(Xmega_FPGA)
#include <include/global.h>
#include <board/ATMEL/Xmega-FPGA/ffconf.h>
#include <board/ATMEL/Xmega-FPGA/lwipopts.h>
#include "xio.h"
#include <io_defs.h>
/*
* Processor choose
*/
//#define STM32F405xx
//#define STM32F415xx
//#define STM32F407xx
//#define STM32F417xx
//#define STM32F427xx
//#define STM32F437xx
//#define STM32F429xx
//#define STM32F439xx
//#define STM32F401xC
//#define STM32F401xE
//#define STM32F410Tx
//#define STM32F410Cx
//#define STM32F410Rx
//#define STM32F411xE
//#define STM32F446xx
#define STM32F469xx
//#define STM32F479xx
/*
* !Processor choose
*/
/*
* Processor clock selection.
*
* If EXTERNAL_CLOCK_VALUE id !0 the reference clock will be EXTERNAL_CLOCK_VALUE.
* If HSE_VALUE value is 0 the reference clock will be the HSI_VALUE.
*/
#define EXTERNAL_CLOCK_VALUE ((unsigned long)0000000) /*!< Value of the External clock in Hz*/
#define CORE_CLOCK_DEFAULT CPU_FREQ /*!< Value of the Processor default clock in Hz*/
/*
* Processor clock selection.
*/
/*
* Debug interface setup.
*/
//#define STD_OUT_PATH "uart-0"/* Is output is directed to serial port you need to provide the path of port */
//#define STD_OUT_PATH "SCREEN<Terminal>"/* If output is directed to screen, need a screen name to be displayed on caption. */
//#define STD_IN_PATH "UART:0"
//#define STD_ERR_PATH "UART:0"
/*
* !Debug interface setup.
*/
/*
* Screen settings
*/
#define SCREENS_COUNT 1
#define SCREEN_CONFIG_1 lcd_UG2832HSWEG04_LANDSCAPE_FLIP
#define USED_SCREEN_CONTROLLER_1 Ssd1306
#define OTHER_SCREEN_1_PARAMS (string)"spi-0.0", (string)"lcd-cd", (string)"lcd-rst"
/*
* !Screen settings
*/
/*
* Touch screen settings
*/
#define TOUCH_SCREEN_ENABLE false
#define CAP_TOUCHSCREEN_I2C_UNIT "i2c-0"
#define CAP_TOUCHSCREEN_IRQ_PIN "touchirq"
//#define USED_TOUCHSCREEN Stmpe811
/*
* !Touch screen settings
*/
/*
* USB settings
*/
#define USE_USB_DEV
//#define USE_USB_HS
//#define USE_USB_FS
/* #define USE_USB_HS_IN_FS */
/*
* !USB settings
*/
/*
* Used fonts
*/
#define USE_FONT_CMSS14B
//#define USE_ALL_FONTS
/*
* !Used fonts
*/
/*
* Eth general settings
*/
#define LWIP_DEBUG_EN false
#define MAX_DHCP_TRIES 4
/*Static IP ADDRESS: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */
#define IP_ADDR0 (unsigned char) 192
#define IP_ADDR1 (unsigned char) 168
#define IP_ADDR2 (unsigned char) 0
#define IP_ADDR3 (unsigned char) 10
/*NETMASK*/
#define NETMASK_ADDR0 (unsigned char) 255
#define NETMASK_ADDR1 (unsigned char) 255
#define NETMASK_ADDR2 (unsigned char) 255
#define NETMASK_ADDR3 (unsigned char) 0
/*Gateway Address*/
#define GW_ADDR0 (unsigned char) 192
#define GW_ADDR1 (unsigned char) 168
#define GW_ADDR2 (unsigned char) 0
#define GW_ADDR3 (unsigned char) 1
/*
* !Eth general settings
*/
/*
* MmcSd settings
*/
#define MMCSD_INTERFACE_COUNT 0
#define USED_MMCSD_CONTROLLER_1 MmcSd_Spi
#define OTHER_MMCSD_1_PARAMS (string)"spi-0.1", (string)NULL, (string)"led-1"
/*
* !MmcSd settings
*/
/*#####################################################*/
#ifdef USE_VISUAL_STUDIO
#include "defs.cpp"
#endif
/*#####################################################*/
#endif/*!FRDM_KEAZ*/
#endif
This diff is collapsed.
/**
******************************************************************************
* @file LwIP/LwIP_HTTP_Server_Raw/Inc/lwipopts.h
* @author MCD Application Team
* @version V1.1.0
* @date 23-September-2016
* @brief lwIP Options Configuration.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics International N.V.
* All rights reserved.</center></h2>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
/**
* SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
* critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 0
/**
* NO_SYS==1: Provides VERY minimal functionality. Otherwise,
* use lwIP facilities.
*/
#define NO_SYS 1
/* ---------- Memory options ---------- */
/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
byte alignment -> define MEM_ALIGNMENT to 2. */
#define MEM_ALIGNMENT 4
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#define MEM_SIZE (10*1024)
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
should be set high. */
#define MEMP_NUM_PBUF 20
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 30
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
connections. */
#define MEMP_NUM_TCP_PCB 30
/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
connections. */
#define MEMP_NUM_TCP_PCB_LISTEN 20
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
segments. */
#define MEMP_NUM_TCP_SEG 24
/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
timeouts. */
#define MEMP_NUM_SYS_TIMEOUT 20
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 20
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 1524
/* ---------- TCP options ---------- */
#define LWIP_TCP 1
#define TCP_TTL 255
/* Controls if TCP should queue segments that arrive out of
order. Define to 0 if your device is low on memory. */
#define TCP_QUEUE_OOSEQ 0
/* TCP Maximum segment size. */
#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF (4*TCP_MSS)
/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
#define TCP_SND_QUEUELEN (2* TCP_SND_BUF/TCP_MSS)
/* TCP receive window. */
#define TCP_WND (2*TCP_MSS)
/* ---------- ICMP options ---------- */
#define LWIP_ICMP 1
/* ---------- DHCP options ---------- */
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
turning this on does currently not work. */
#define LWIP_DHCP 1
/* ---------- UDP options ---------- */
#define LWIP_UDP 1
#define UDP_TTL 255
/* ---------- Statistics options ---------- */
#define LWIP_STATS 0
#define LWIP_PROVIDE_ERRNO 1
/* ---------- link callback options ---------- */
/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
* whenever the link changes (i.e., link down)
*/
#define LWIP_NETIF_LINK_CALLBACK 1
/*
--------------------------------------
---------- Checksum options ----------
--------------------------------------
*/
/*
The STM32F7xxallows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
- To use this feature let the following define uncommented.
- To disable it and process by CPU comment the the checksum.
*/
#define CHECKSUM_BY_HARDWARE
#ifdef CHECKSUM_BY_HARDWARE
/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 0
/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 0
/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 0
/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 0
/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 0
/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 0
/* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
#define CHECKSUM_GEN_ICMP 0
#else
/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 1
/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 1
/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 1
/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 1
/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 1
/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 1
/* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
#define CHECKSUM_GEN_ICMP 1
#endif
/*
----------------------------------------------
---------- Sequential layer options ----------
----------------------------------------------
*/
/**
* LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
*/
#define LWIP_NETCONN 0
/*
------------------------------------
---------- Socket options ----------
------------------------------------
*/
/**
* LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
*/
#define LWIP_SOCKET 0
/*
------------------------------------
---------- httpd options ----------
------------------------------------
*/
/** Set this to 1 to support CGI */
#define LWIP_HTTPD_CGI 1
/** Set this to 1 to support SSI (Server-Side-Includes) */
#define LWIP_HTTPD_SSI 0
/** Set this to 1 to include "fsdata_custom.c" instead of "fsdata.c" for the
* file system (to prevent changing the file included in CVS) */
#define HTTPD_USE_CUSTOM_FSDATA 0
/*
----------------------------------------
---------- Lwip Debug options ----------
----------------------------------------
*/
//#define LWIP_DEBUG 0
#endif /* __LWIPOPTS_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#ifndef XIO_H_
#define XIO_H_
#include <avr/io.h>
/* RTC counter */
typedef struct FPGA_RTC_struct
{
register8_t RTC_CNT_BYTE0;
register8_t RTC_CNT_BYTE1;
register8_t RTC_CNT_BYTE2;
register8_t RTC_CNT_BYTE3;
register8_t RTC_PERIOD_BYTE0;
register8_t RTC_PERIOD_BYTE1;
register8_t RTC_PERIOD_BYTE2;
register8_t RTC_PERIOD_BYTE3;
} FPGA_RTC_t;
/* I/O Ports */
typedef struct FPGA_PORT_struct
{
register8_t DIR; /* I/O Port Data Direction */
register8_t DIRSET; /* I/O Port Data Direction Set */
register8_t DIRCLR; /* I/O Port Data Direction Clear */
register8_t DIRTGL; /* I/O Port Data Direction Toggle */
register8_t OUT; /* I/O Port Output */
register8_t OUTSET; /* I/O Port Output Set */
register8_t OUTCLR; /* I/O Port Output Clear */
register8_t OUTTGL; /* I/O Port Output Toggle */
register8_t IN; /* I/O port Input */
register8_t INTCTRL; /* Interrupt Control Register */
register8_t INTMASK; /* Port Interrupt Mask */
register8_t reserved_0x0B;
register8_t INTFLAGS; /* Interrupt Flag Register */
register8_t reserved_0x0D;
register8_t REMAP; /* Pin Remap Register */
register8_t reserved_0x0F;
register8_t PIN0CTRL; /* Pin 0 Control Register */
register8_t PIN1CTRL; /* Pin 1 Control Register */
register8_t PIN2CTRL; /* Pin 2 Control Register */
register8_t PIN3CTRL; /* Pin 3 Control Register */
register8_t PIN4CTRL; /* Pin 4 Control Register */
register8_t PIN5CTRL; /* Pin 5 Control Register */
register8_t PIN6CTRL; /* Pin 6 Control Register */
register8_t PIN7CTRL; /* Pin 7 Control Register */
} FPGA_PORT_t;